Module libnoentiendo::memory

A memory::Memory implementation can be read from and written to, but it can also be polled for interrupts. This is used for the PIA, VIA, and other chips that interface over memory but also trigger interrupts. The memory module provides implementations for various types of memory and other memory-mapped devices. Mappings are handled using memory::BranchMemory.

Modules

• mos652x
  The various interface adapters (6520, 6522, 6526) for the MOS 6502 CPU.

Structs

• BankedMemory
  Represents the memory banking features found in the Commodore 64 and other devices. Multiple memory implementations are all mapped to the same address space. The active implementation is selected by external logic.
• BlockMemory
  Represents a simple block of contiguous memory, with no additional hardware. This can be used to represent both RAM and ROM. Reading from this memory is side-effect free.
• BranchMemory
  Maps several Memory objects into a single contiguous address space. Each mapped object is assigned a starting address, and reads and writes will have the starting address subtracted from them before being passed to the underlying Memory object.
• LoggingMemory
• Mos6510Port
  Represents the port built into a MOS 6510 processor, mapped to memory addresses 0x0000 (for the DDR) and 0x0001 (for the port itself).
• NullMemory
  Memory that does nothing when read or written to.
• NullPort
  A Port that does nothing.

Enums

• ActiveInterrupt
  Represents the state of the interrupts on the system.

Traits

• Memory
  Represents a contiguous block of memory which can be read, written, reset, and polled to see if an interrupt has been triggered.
• Port
  A Port that can be read from, written to, reset, or polled for interrupts. Used in the MOS 6520 PIA and the 6522 VIA.